张昊

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张昊

职称: 副教授 学院: 计算机科学与技术学院 电子邮箱: hao.zhang@ouc.edu.cn 办公室: 西海岸校区计算机楼B515
  • 基本信息
  • 项目
  • 获奖
  • 论文
  • 课程
  • 教材或专著
  • 专利
  • Research Fields
  • Achievement
  • Social Appointments
  • Teaching Experience
  • Honor Title
  • Additional Information
  • 基本信息
    姓名: 张昊 出生年月: 最高学位:博士 入职海大时间: 2021-03
    主要研究方向:数字集成电路设计,算法加速器设计,人工智能算法 专业技术职务:副教授 导师类别:硕士生导师
    年均课时数: 是否第一学科:是
    国内外重要学术组织任职:IEEE-CAS VLSI系统与应用技术委员会(VSA-TC)委员;山东省智能感知芯片与系统重点实验室副主任
    获得人才称号名称及获得年份:
    其他情况简介: 2019年10月毕业于加拿大萨斯卡彻温大学(加拿大Top10研究型公立大学),获得博士学位。2020年11月于加拿大萨斯卡彻温大学完成博士后经历。2021年03月以“青年英才工程第三层次”入职中国海洋大学,现任中国海洋大学计算机科学与技术学院副教授,硕士生导师。主要从事高能效算术运算单元设计,AI芯片设计、AI模型加速及可重构高性能计算等方面的研究,着力于存算一体、科学计算与智能计算功能融合的新型AI芯片架构、新型AI计算范式的设计,推动国产化AI芯片在海洋边缘计算领域的应用。目前在相关领域顶尖国际期刊和学术会议累计发表论文20余篇,主持或参与多项AI芯片架构设计相关的国家级和省部级科研项目。参与多项山东省智能芯片与产业应用技术创新中心的研发工作。担任IEEE电路与系统学会VLSI系统与应用技术委员会(VSA-TC)委员,参与IEEE P3109机器学习数据格式及运算方法标准(Standard for Arithmetic Formats for Machine Learning)的制定工作以及新版IEEE 754-2029浮点数算术标准(IEEE Standard for Floating-Point Arithmetic)的修订工作。长期担任IEEE TC,IEEE TCAS-I/II, IEEE TVLSI,IEEE Access,IEEE JBHI等期刊以及IEEE ISCAS,IEEE AICAS,DATE,ARITH等国际学术会议的审稿人。欢迎对计算机系统结构、人工智能硬件架构设计、VLSI/FPGA系统架构设计感兴趣、有基础的同学加入我的团队。

    招生方向:面向海洋领域的AI算法、AI处理器设计、AI模型部署优化、算法加速器设计

    团队主页:
    山东省智能感知芯片与系统重点实验室:https://it.ouc.edu.cn/iscs/
    海洋大数据国家地方联合工程研究中心:https://obd.ouc.edu.cn/
    个人主页:https://haozhang-qd.github.io/
  • 项目
    • 1. 国家重点研发计划, , 2024/12 ~ 2027/11, 主持
    • 2. 装备预研教育部联合基金, 一般项目, 2024/01 ~ 2025/12, 主持
    • 3. 山东省自然科学基金, 青年项目, 2024/01 ~ 2026/12, 主持
    • 4. 中央引导地方科技发展项目, 山东省重点研发计划, 2023/11 ~ 2025/11, 子课题负责人
    • 5. 青岛市自然科学基金, 青年项目, 2023/07 ~ 2025/06, 主持
    • 6. 国家自然科学基金, 面上项目, 2023/01 ~ 2026/12, 参与
    • 7. 青年英才工程科研启动经费, , 2021/04 ~ 2024/03, 主持
    • 8. Microsoft AI for Earth, , ~ , 主持
    • 9. Natural Sciences and Engineering Research Council of Canada(NSERC)Discovery Grant, , ~ , 参与
    • 10. ICT R&D Program of MSIT/IITP, , ~ , 参与
    • 11. R&D Program of MOTIE/KEIT, , ~ , 参与
    • 12. Mitacs Accelerate, , ~ , 参与
    • 13. Mitacs Accelerate, , ~ , 参与
    • 14. NVIDIA GPU Grant, , ~ , 参与
    • 15. Intel Hardware Acceleration Research Program (HARP), , ~ , 参与
  • 获奖
  • 论文
    • 1. Energy Efficient Spike Transformer Accelerator at the Edge, Intelligent Marine Technology and Systems, Sep 2024, , 通讯作者
    • 2. Energy Efficient FPGA-Based Binary Transformer Accelerator for Edge Devices, IEEE International Symposium on Circuits and Systems, May 2024, EI, 通讯作者
    • 3. Decoder Reduction Approximation Scheme for Booth Multipliers, IEEE Transactions on Computers, Mar 2024, SCIE, 第二作者
    • 4. Efficient FPGA Based Transformer Accelerator Using In Block Balanced Pruning, International Conference on Communications, Circuits and Systems, May 2024, EI, 通讯作者
    • 5. Energy Efficient FPGA Based Accelerator for Dynamic Sparse Transformer, International Conference on Communications, Circuits and Systems, May 2024, EI, 通讯作者
    • 6. An Energy-Efficient Architecture of Approximate Softmax Functions for Transformer in Edge Computing, International Conference on Electronics and Electrical Engineering Technology, Dec 2023, EI, 通讯作者
    • 7. Efficient Approximate 4-2 Compressors and Error Compensation Strategies for Approximate Multipliers, International Conference on Electronics and Electrical Engineering Technology, Dec 2023, EI, 通讯作者
    • 8. Merge Loss Calculation Method for Highly Imbalanced Data Multiclass Classification, IEEE Transactions on Neural Networks and Learning Systems, Oct 2023, SCIE, 第二作者
    • 9. Anterior mediastinal nodular lesion segmentation from chest computed tomography imaging using UNet based neural network with attention mechanisms, Multimedia Tools and Applications, Oct 2023, SCIE, 第三作者
    • 10. Design of Energy Efficient Logarithmic Approximate Multiplier, 2023 5th International Conference on Circuits and Systems (ICCS), Oct 2023, EI, 通讯作者
    • 11. Energy Efficient FPGA-Based Accelerator for Deep Spiking Neural Networks, 2023 IEEE 3rd International Conference on Computer Systems (ICCS), Sep 2023, EI, 第一作者、通讯作者
    • 12. High Performance and Energy Efficient Floating-Point Multiplier on FPGA, 2023 IEEE 3rd International Conference on Computer Systems (ICCS), Sep 2023, EI, 第一作者、通讯作者
    • 13. Efficient Approximate Posit Multipliers for Deep Learning Computation, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Mar 2023, SCIE, 第一作者
    • 14. SFCNet: Deep Learning-based Lightweight Separable Factorized Convolution Network for Landslide Detection, Journal of the Indian Society of Remote Sensing, Apr 2023, SCIE, 第四作者
    • 15. Variable-Precision Approximate Floating-Point Multiplier for Efficient Deep Learning Computation, IEEE Transactions on Circuits and Systems II: Express Briefs, Mar 2022, SCIE, 第一作者
    • 16. Segmentation for Document Layout Analysis: Not Dead Yet, International Journal on Document Analysis and Recognition, Jan 2022, SCIE, 第二作者
    • 17. Energy Efficient Spiking Neural Network Processing Using Approximate Arithmetic Units and Variable Precision Weights, Journal of Parallel and Distributed Computing, Aug 2021, SCIE, 第二作者
    • 18. FPGA-Based Approximate Multiplier for Efficient Neural Computation, International Conference on Consumer Electronics Asia (ICCE-Asia 2021), Oct 2021, , 第一作者
    • 19. A Real-Time Architecture for Pruning the Effectual Computations in Deep Neural Networks, IEEE Transactions on Circuits and Systems I: Regular Papers, May 2021, SCIE, 第二作者
    • 20. Efficient Multiple-Precision Posit Multiplier, IEEE International Symposium on Circuits and Systems (ISCAS 2021), May 2021, CPCI-S, 第一作者
    • 21. Document Structure Extraction: An Exploratory Study, 2020 Fourth International Workshop on Scientific Document Analysis (SCIDOCA2020), Nov 2020, , 第三作者
    • 22. Novel Convolutional Neural Network Architecture for Improved Pulmonary Nodule Classification on Computed Tomography, Multidimensional Systems and Signal Processing, Jul 2020, SCIE, 第二作者
    • 23. Design of Power Efficient Posit Multiplier, IEEE Transactions on Circuits and Systems II: Express Briefs, May 2020, SCIE, 第一作者
    • 24. Breast Cancer Classification in Automated Breast Ultrasound using Multi-View CNN with Transfer Learning, Ultrasound in Medicine & Biology, May 2020, SCIE, 其他作者
    • 25. Deep Learning for Classification of A Small (≤2cm) Pulmonary Nodule on CT Imaging: A Preliminary Study, Academic Radiology, Apr 2020, SCIE, 其他作者
    • 26. New Flexible Multiple-Precision Multiply-Accumulate Unit for Deep Neural Network Training and Inference, IEEE Transactions on Computers, Jan 2020, SCIE, 第一作者
    • 27. Efficient Spiking Neural Network Training and Inference with Reduced Precision Memory and Computing, IET Computers & Digital Techniques, Sep 2019, SCIE, 第三作者
    • 28. Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support, IEEE Transactions on Computers, Jul 2019, SCIE, 第一作者
    • 29. Efficient Posit Multiply-Accumulate Unit Generator for Deep Learning Applications, 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, CPCI-S, 第一作者
    • 30. Improved Hybrid Memory Cube for Weight-Sharing Deep Convolutional Neural Networks, 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Mar 2019, CPCI-S, 第一作者
    • 31. Retinal Blood Vessel Segmentation Using Fully Convolutional Network with Transfer Learning, Computerized Medical Imaging and Graphics, Sep 2018, SCIE, 第二作者
    • 32. Efficient Fixed Floating-Point Merged Mixed-Precision Multiply-Accumulate Unit for Deep Learning Processors, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, CPCI-S, 第一作者
    • 33. High Performance and Energy Efficient Single-Precision and Double-Precision Merged Floating-Point Adder on FPGA, IET Computers & Digital Techniques, Jan 2018, SCIE, 第一作者
    • 34. Area- and Power-Efficient Iterative Single/Double-Precision Merged Floating-Point Multiplier on FPGA, IET Computers & Digital Techniques, Jul 2017, SCIE, 第一作者
    • 35. Decimal Floating-Point Fused Multiply-Add with Redundant Internal Encodings, IET Computers & Digital Techniques, Jul 2016, SCIE, 第二作者
    • 36. Area and Power Efficient Decimal Carry-Free Adder, Electronics Letters, Nov 2015, SCIE, 第二作者
  • 课程
    • 1. 计算机组成原理, 学科基础课, 3.5, 64
    • 2. 智能计算系统, 专业知识课, 2.5, 48
    • 3. 计算机组成与设计(微电子科学与工程), 专业知识课, 3.5, 64
    • 4. 高级计算机体系结构(英文), 研究生, , 64
    • 5. 人工智能–探索人类智慧的奥秘, 通识课, 2.0, 32
    • 6. 大数据与智能计算前沿技术, 专业课, 2.0, 32
  • 教材或专著
  • 专利
  • 成果转化与社会服务
  • Research Fields
  • Achievement
    • 1. 国家重点研发计划, , 2024/12 ~ 2027/11, 主持
    • 2. 装备预研教育部联合基金, 一般项目, 2024/01 ~ 2025/12, 主持
    • 3. 山东省自然科学基金, 青年项目, 2024/01 ~ 2026/12, 主持
    • 4. 中央引导地方科技发展项目, 山东省重点研发计划, 2023/11 ~ 2025/11, 子课题负责人
    • 5. 青岛市自然科学基金, 青年项目, 2023/07 ~ 2025/06, 主持
    • 6. 国家自然科学基金, 面上项目, 2023/01 ~ 2026/12, 参与
    • 7. 青年英才工程科研启动经费, , 2021/04 ~ 2024/03, 主持
    • 8. Microsoft AI for Earth, , ~ , 主持
    • 9. Natural Sciences and Engineering Research Council of Canada(NSERC)Discovery Grant, , ~ , 参与
    • 10. ICT R&D Program of MSIT/IITP, , ~ , 参与
    • 11. R&D Program of MOTIE/KEIT, , ~ , 参与
    • 12. Mitacs Accelerate, , ~ , 参与
    • 13. Mitacs Accelerate, , ~ , 参与
    • 14. NVIDIA GPU Grant, , ~ , 参与
    • 15. Intel Hardware Acceleration Research Program (HARP), , ~ , 参与
  • Social Appointments
  • Teaching Experience
    • 1. Energy Efficient Spike Transformer Accelerator at the Edge, Intelligent Marine Technology and Systems, Sep 2024, , 通讯作者
    • 2. Energy Efficient FPGA-Based Binary Transformer Accelerator for Edge Devices, IEEE International Symposium on Circuits and Systems, May 2024, EI, 通讯作者
    • 3. Decoder Reduction Approximation Scheme for Booth Multipliers, IEEE Transactions on Computers, Mar 2024, SCIE, 第二作者
    • 4. Efficient FPGA Based Transformer Accelerator Using In Block Balanced Pruning, International Conference on Communications, Circuits and Systems, May 2024, EI, 通讯作者
    • 5. Energy Efficient FPGA Based Accelerator for Dynamic Sparse Transformer, International Conference on Communications, Circuits and Systems, May 2024, EI, 通讯作者
    • 6. An Energy-Efficient Architecture of Approximate Softmax Functions for Transformer in Edge Computing, International Conference on Electronics and Electrical Engineering Technology, Dec 2023, EI, 通讯作者
    • 7. Efficient Approximate 4-2 Compressors and Error Compensation Strategies for Approximate Multipliers, International Conference on Electronics and Electrical Engineering Technology, Dec 2023, EI, 通讯作者
    • 8. Merge Loss Calculation Method for Highly Imbalanced Data Multiclass Classification, IEEE Transactions on Neural Networks and Learning Systems, Oct 2023, SCIE, 第二作者
    • 9. Anterior mediastinal nodular lesion segmentation from chest computed tomography imaging using UNet based neural network with attention mechanisms, Multimedia Tools and Applications, Oct 2023, SCIE, 第三作者
    • 10. Design of Energy Efficient Logarithmic Approximate Multiplier, 2023 5th International Conference on Circuits and Systems (ICCS), Oct 2023, EI, 通讯作者
    • 11. Energy Efficient FPGA-Based Accelerator for Deep Spiking Neural Networks, 2023 IEEE 3rd International Conference on Computer Systems (ICCS), Sep 2023, EI, 第一作者、通讯作者
    • 12. High Performance and Energy Efficient Floating-Point Multiplier on FPGA, 2023 IEEE 3rd International Conference on Computer Systems (ICCS), Sep 2023, EI, 第一作者、通讯作者
    • 13. Efficient Approximate Posit Multipliers for Deep Learning Computation, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Mar 2023, SCIE, 第一作者
    • 14. SFCNet: Deep Learning-based Lightweight Separable Factorized Convolution Network for Landslide Detection, Journal of the Indian Society of Remote Sensing, Apr 2023, SCIE, 第四作者
    • 15. Variable-Precision Approximate Floating-Point Multiplier for Efficient Deep Learning Computation, IEEE Transactions on Circuits and Systems II: Express Briefs, Mar 2022, SCIE, 第一作者
    • 16. Segmentation for Document Layout Analysis: Not Dead Yet, International Journal on Document Analysis and Recognition, Jan 2022, SCIE, 第二作者
    • 17. Energy Efficient Spiking Neural Network Processing Using Approximate Arithmetic Units and Variable Precision Weights, Journal of Parallel and Distributed Computing, Aug 2021, SCIE, 第二作者
    • 18. FPGA-Based Approximate Multiplier for Efficient Neural Computation, International Conference on Consumer Electronics Asia (ICCE-Asia 2021), Oct 2021, , 第一作者
    • 19. A Real-Time Architecture for Pruning the Effectual Computations in Deep Neural Networks, IEEE Transactions on Circuits and Systems I: Regular Papers, May 2021, SCIE, 第二作者
    • 20. Efficient Multiple-Precision Posit Multiplier, IEEE International Symposium on Circuits and Systems (ISCAS 2021), May 2021, CPCI-S, 第一作者
    • 21. Document Structure Extraction: An Exploratory Study, 2020 Fourth International Workshop on Scientific Document Analysis (SCIDOCA2020), Nov 2020, , 第三作者
    • 22. Novel Convolutional Neural Network Architecture for Improved Pulmonary Nodule Classification on Computed Tomography, Multidimensional Systems and Signal Processing, Jul 2020, SCIE, 第二作者
    • 23. Design of Power Efficient Posit Multiplier, IEEE Transactions on Circuits and Systems II: Express Briefs, May 2020, SCIE, 第一作者
    • 24. Breast Cancer Classification in Automated Breast Ultrasound using Multi-View CNN with Transfer Learning, Ultrasound in Medicine & Biology, May 2020, SCIE, 其他作者
    • 25. Deep Learning for Classification of A Small (≤2cm) Pulmonary Nodule on CT Imaging: A Preliminary Study, Academic Radiology, Apr 2020, SCIE, 其他作者
    • 26. New Flexible Multiple-Precision Multiply-Accumulate Unit for Deep Neural Network Training and Inference, IEEE Transactions on Computers, Jan 2020, SCIE, 第一作者
    • 27. Efficient Spiking Neural Network Training and Inference with Reduced Precision Memory and Computing, IET Computers & Digital Techniques, Sep 2019, SCIE, 第三作者
    • 28. Efficient Multiple-Precision Floating-Point Fused Multiply-Add with Mixed-Precision Support, IEEE Transactions on Computers, Jul 2019, SCIE, 第一作者
    • 29. Efficient Posit Multiply-Accumulate Unit Generator for Deep Learning Applications, 2019 IEEE International Symposium on Circuits and Systems (ISCAS), May 2019, CPCI-S, 第一作者
    • 30. Improved Hybrid Memory Cube for Weight-Sharing Deep Convolutional Neural Networks, 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS), Mar 2019, CPCI-S, 第一作者
    • 31. Retinal Blood Vessel Segmentation Using Fully Convolutional Network with Transfer Learning, Computerized Medical Imaging and Graphics, Sep 2018, SCIE, 第二作者
    • 32. Efficient Fixed Floating-Point Merged Mixed-Precision Multiply-Accumulate Unit for Deep Learning Processors, 2018 IEEE International Symposium on Circuits and Systems (ISCAS), May 2018, CPCI-S, 第一作者
    • 33. High Performance and Energy Efficient Single-Precision and Double-Precision Merged Floating-Point Adder on FPGA, IET Computers & Digital Techniques, Jan 2018, SCIE, 第一作者
    • 34. Area- and Power-Efficient Iterative Single/Double-Precision Merged Floating-Point Multiplier on FPGA, IET Computers & Digital Techniques, Jul 2017, SCIE, 第一作者
    • 35. Decimal Floating-Point Fused Multiply-Add with Redundant Internal Encodings, IET Computers & Digital Techniques, Jul 2016, SCIE, 第二作者
    • 36. Area and Power Efficient Decimal Carry-Free Adder, Electronics Letters, Nov 2015, SCIE, 第二作者
  • Honor Title
    • 1. 计算机组成原理, 学科基础课, 3.5, 64
    • 2. 智能计算系统, 专业知识课, 2.5, 48
    • 3. 计算机组成与设计(微电子科学与工程), 专业知识课, 3.5, 64
    • 4. 高级计算机体系结构(英文), 研究生, , 64
    • 5. 人工智能–探索人类智慧的奥秘, 通识课, 2.0, 32
    • 6. 大数据与智能计算前沿技术, 专业课, 2.0, 32
  • Additional Information